your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...
RESPONSIBILITIES: As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: Write microarchitecture... your career. THE ROLE: A senior technical contributor that drives end-to-end delivery of SerDes solution directly contributing...
Applications Engineer – DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading... Experience on memory subsystem verification and/or performance analysis Strong knowledge of ASIC flow, RTL design in Verilog...
solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...
services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...
for our custom NPU. You are the engineer who will not only build our ML platform but also design the intelligent agents it deploys... as a senior individual contributor, leading by example with hands-on coding, design, and analysis across the entire ML stack...