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Keywords: SerDes Verification Engineer, Location: Bangalore, Karnataka

Page: 1

Senior Design Verification Engineer – SerDes IP

your career. THE ROLE We are looking for a Senior Design Verification Engineer to join our SerDes IP team focused on high...-speed wireline transceivers (e.g., PAM4 at 56G/112G and beyond). In this role, you will verify complex SerDes digital...

Posted Date: 07 Jan 2026

SerDes Verification Engineer

your career. As a SerDes Verification Architect, you will be responsible for the verification and validation of high-speed... standards. Key Responsibilities: Verification of SerDes Designs: Develop and execute verification plans and testbenches...

Posted Date: 08 Feb 2026

Analog Design, Sr Staff Engineer - Serdes IP

.Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs Analog Design, Sr Staff Engineer... - Serdes IP Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview Our Hardware...

Company: Synopsys
Posted Date: 30 Jan 2026

SerDes IP Senior Analog Design Engineer

.Multikeywordfacets-Hardware"> Join our Talent Community! . Find Jobs For Where? Search Jobs SerDes IP Senior Analog Design... Engineer Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview Our Hardware Engineers...

Company: Synopsys
Posted Date: 30 Jan 2026

Serdes PHY Analog Design Engineer

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...+ years of Hardware Engineering or related work experience. Job Function BDC SerDes Mixed-Signal design team is actively...

Company: Qualcomm
Posted Date: 22 Nov 2025

Principal Design Engineer

Lead Analog Design Engineer will take a Key role on the Analog and Mixed signal design team as part of a Die to Die Product... Development Team. Job Responsibilities: Design of High Speed D2D and SERDES products at industry standard data rates up...

Posted Date: 05 Feb 2026

Applications Engineering, Principal Engineer

, Principal Engineer Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview Our Hardware... tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor...

Company: Synopsys
Posted Date: 30 Jan 2026

ASIC Digital Design, Principal Engineer

Engineer Bengaluru, Karnataka, India Engineering Employee Save Job Share Jump to Overview Our Hardware Engineers... such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products...

Company: Synopsys
Posted Date: 30 Jan 2026

Senior Hardware Design Engineer

Senior Hardware Design Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily.... Join us redefine what’s next for you. What you’ll do: Lead Hardware Engineer for new product hardware design and development...

Posted Date: 30 Jan 2026

Senior Principal Engineer

We are seeking a Principal Engineer for a leading provider of innovative technologies, including ultra-fast read... but not required: Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module Software. Experience with designing...

Posted Date: 22 Jan 2026

Backend Design Engineer - IC (Analog & IP characterization)

a talented and detail-oriented Backend Design Engineer to join our IC (Integrated circuit) development team. The role involves...-performance circuits for frequency synthesis and clock generation. You will also work as an Engineer for Liberate...

Company: Nokia
Posted Date: 18 Jan 2026

Lead Product Engineer

. Job Title: Lead Product Engineer Location: Bangalore About Us Cadence is a pivotal leader in electronic design, building... / customization of CDNS SERDES IP subsystems. Analyze and resolve complex subsystem application or implementation issues and provide...

Posted Date: 14 Jan 2026

Principal Engineer-Analog Circuit Design

Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central... designer to be part of a key team designing highly sophisticated CMOS transceiver/SERDES products. Responsibilities would span...

Company: Marvell
Posted Date: 10 Jan 2026

Silicon Design Engineer

your career. MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the PD Full Chip STA closure and optimization team..., you will work on SoC Full Chip Timing closure which includes high frequency CPU, HBM, DDR, Serdes interfaces. Will be responsible...

Posted Date: 04 Jan 2026

STAFF R&D/PRODUCT DVL ENGINEER

Jobs Job Description Apply now Start Please wait... Job Title: STAFF R&D/PRODUCT DVL ENGINEER Posting Start Date: 11/4/25... Job Description: Job Overview As a Product Dvl Engineer in the Signal Integrity team you will focus on the electrical design, simulation...

Posted Date: 22 Nov 2025

SR R&D/PRODUCT DVL ENGINEER

Jobs Job Description Apply now Start Please wait... Job Title: SR R&D/PRODUCT DVL ENGINEER Posting Start Date: 11/4/25... Job Description: Job Overview As a Product Dvl Engineer in the Signal Integrity team you will focus on the electrical design, simulation...

Posted Date: 22 Nov 2025

STAFF SIGNAL INTEGRITY DVL ENGINEER

Jobs Job Description Apply now Start Please wait... Job Title: STAFF SIGNAL INTEGRITY DVL ENGINEER Posting Start Date: 11/18/25... Job Description: Job Overview As a Product Dvl Engineer in the Signal Integrity team you will focus on the electrical design, simulation...

Posted Date: 22 Nov 2025

STAFF SIGNAL INTEGRITY DVL ENGINEER

Jobs Job Description Apply now Start Please wait... Job Title: STAFF SIGNAL INTEGRITY DVL ENGINEER Posting Start Date: 11/18/25... transmission. Familiarity with high-speed SerDes signal processing, including equalization, clock recovery, and channel adaptation...

Posted Date: 21 Nov 2025

Lead DFx Engineer

your career. SMTS SILICON DESIGN ENGINEER THE ROLE: Circuit Technology team is looking for a passionate and experienced DFT... Methodology/Architect/RTL execution Lead for the high-speed SERDES Phys, Next gen Memory Phys and Die-to-Die interconnect IPs...

Posted Date: 14 Nov 2025

Principal Design Engineer

architecture, digital RTL, low power design, synthesis and timing analysis, and behavioral coding for all IPs in the SerDes..., digital verification, project management, and digital and analog design teams in multiple worldwide geographies...

Posted Date: 07 Feb 2026