Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: SoC Design Engineer, Location: Santa Clara, CA

Page: 3

Physical Design Engineer Intern - Bachelor's Degree

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell CCDS (Central CAD and Design... Services) PD engineers are working on cutting edge SoC (System on a Chip), ASIC, High Performance Processor, Digital/Analog...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025
Salary: $27 - 55 per hour

Senior Principal Digital IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Our design team works on state...-of-the-art datacenter and AI SOCs. As a member of the R&D team, you will design world-class hardware for the industry...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

SRAM Circuit Design Engineer

We are looking for applicants with work experience within a SoC design cycle, developing circuits and SRAM/Register File for low power, low voltage...Do you have a passion for crafting entirely new solutions? Be a part of a world-class silicon design team...

Company: Apple
Location: Santa Clara, CA
Posted Date: 16 Oct 2025

ASIC Design Engineer - Cache Controller

of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system..., we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025
Salary: $126800 - 190900 per year

ASIC Design Engineer - Cache Controller

of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system..., we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

ASIC Design Engineer - Cache Controller

of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system..., we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

AI/ML Design Verification Methodology Lead Engineer

and design of multiple complex blocks/SoC or IC Packages. Writes detailed technical documentation for highly complex EDA/IP...: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 09 Oct 2025

Senior Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design... that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025

Principal Engineer, Design Verification

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low...++, and DPI. - Verification at different levels of hierarchy including block/unit, subsystem, and SOC levels. - Working closely...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Oct 2025
Salary: $146850 - 220000 per year

Principal Design Verification Engineer

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low...-power techniques. As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Sep 2025
Salary: $146850 - 220000 per year

Principal Silicon Design Engineer

and IP level design, SOC architecture and implementation strategies. THE PERSON: Excellent communication and presentation... experience in reusable verification methodology such as UVM Have hands-on experience in SOC Design/Integration activities...

Posted Date: 20 Sep 2025

Senior System Design Engineer

What You'll be Doing: Build system hardware products around GPU & Tegra SoC. Collaborate with cross-function team... for better performance, and lower cost. Improve the design flow together with the infrastructure team. What We Need to See: B.S or M...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 17 Sep 2025

Senior ASIC Verification Engineer

in SOC and GPU ASIC. The complexity of the clocks and resets design has increased many folds. This requires sophisticated...The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Senior System Software Engineer - Autonomous Vehicles AI Applications

computing system architecture design is invaluable. Deep understanding of SOC firmware, power management, and performance...NVIDIA is searching for a highly motivated, creative engineer with experience in system software to join the Embedded...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 07 Dec 2025

Principal Engineer Software (Threat Detection Engineer)

. Job Description Your Career Threat Detection Engineer - (Threat Data Platform) The Threat Data Platform team specializes in providing tools... expertise in an operational security role - soc analysis, reverse engineering, threat intelligence monitoring and/or creation...

Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $173000 - 237500 per year

Sr Staff Software Engineer (Threat Detection Engineer)

. Job Description Your Career Threat Detection Engineer (Threat Data Platform) The Threat Data Platform team specializes in providing tools... expertise in an operational security role - soc analysis, reverse engineering, threat intelligence monitoring and/or creation...

Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $149000 - 204000 per year

Principal Software Engineer (Threat Detection Engineer - Tool Development)

. Job Description Your Career Threat Detection Engineer (Threat Data Platform) The Threat Data Platform team specializes in providing tools... expertise in an operational security role - soc analysis, reverse engineering, threat intelligence monitoring and/or creation...

Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $173000 - 237500 per year

Principal Engineer Software (Threat Detection Engineer)

. Job Description Your Career Threat Detection Engineer - (Threat Data Platform) The Threat Data Platform team specializes in providing tools... expertise in an operational security role - soc analysis, reverse engineering, threat intelligence monitoring and/or creation...

Location: Santa Clara, CA
Posted Date: 05 Dec 2025
Salary: $173000 - 237500 per year

Sr Staff Security Software Engineer (Threat Detection Engineer - Tool Development)

. Job Description Your Career Threat Detection Engineer (Threat Data Platform) The Threat Data Platform team specializes in providing tools... expertise in an operational security role - soc analysis, reverse engineering, threat intelligence monitoring and/or creation...

Location: Santa Clara, CA
Posted Date: 05 Dec 2025
Salary: $149000 - 204000 per year

Sr Staff Security Software Engineer (Threat Detection Engineer - Tool Development)

. Job Description Your Career Threat Detection Engineer (Threat Data Platform) The Threat Data Platform team specializes in providing tools... expertise in an operational security role - soc analysis, reverse engineering, threat intelligence monitoring and/or creation...

Location: Santa Clara, CA
Posted Date: 05 Dec 2025
Salary: $149000 - 204000 per year