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Keywords: System Design Engineer, Location: Santa Clara, CA

Page: 6

GPU Design Engineer - Memory Hierarchy

help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll...! Description As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade...

Company: Apple
Location: Santa Clara, CA
Posted Date: 06 Nov 2025
Salary: $126800 - 190900 per year

GPU Design Engineer - Memory Hierarchy

help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll...! Description As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade...

Company: Apple
Location: Santa Clara, CA
Posted Date: 05 Nov 2025

ASIC Design Engineer

engineer to join our exciting team of problem solvers. Description The ideal candidate will have experience in ASIC design... with: - Architecture research and/or development of memory or highly interconnected system architectures. - RTL/micro-architecture...

Company: Apple
Location: Santa Clara, CA
Posted Date: 31 Oct 2025
Salary: $126800 - 190900 per year

Sr. Photonics Design engineer

new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers... and care for you at work, at home, or wherever you may go. Learn more about our . We are looking for a Sr Photonics Engineer...

Location: Santa Clara, CA
Posted Date: 30 Oct 2025

Senior ASIC Design Engineer – Clocks IP

from the crowd: Experience with clocks controller, clocks logic design Understanding of system level artifacts like power... ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

PCB Layout Physical Design Engineer - CAD

your career. THE ROLE: As a PCB Layout Physical Design Engineer - CAD in our Networking Technology & Solutions Group (NTSG.... THE PERSON: In this role, you will closely collaborate with Silicon IP team, ASIC packaging team, PCB team, System...

Posted Date: 24 Oct 2025

Senior Mixed Signal Design Engineer

, come join this diverse team and help move the needle! We are looking for a senior engineer to be part of the mixed-signal design team... characterization. Help by defining circuit requirements and complete design from schematic, layout, and verification...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Oct 2025

Senior Circuit Design Engineer - Power

We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing Power Circuits... with other System/Software Architects, Power Integrity /Packaging experts and Product and Process engineers to understand product...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Oct 2025

Senior Optical Transceiver Design Engineer

. What You'll Do Arista Networks is seeking an exceptional Senior Optical Transceiver Design Engineer to join our fast-paced.... Hands-on experience with: PCB schematic design and layout review for optical modules. High-speed opto-electrical system...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 12 Oct 2025

Digital IC Design Staff Engineer

and integrate IPs for System-on-Chip SoC solutions using state-of-art IC design methodologies, clock domain crossing (CDC)-based... of design on block and system level using Verilog and hardware description language (HDL). Perform synthesis and timing closure...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Oct 2025
Salary: $105470 - 158000 per year

Senior ASIC RTL Design Engineer

: RTL design of high speed design, clock/reset/power features, IP Integration, sub-system level design Architect.... As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design...

Posted Date: 26 Dec 2025

Analog Design Engineer

and active filters. System and transistor-level analysis and design of integrated circuits. Schematic design, simulation... field with a focus on mixed-signal circuit design. Must have skills in: Digital MOS VLSI circuit design and layout...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 20 Dec 2025
Salary: $156853 - 160000 per year

Senior Staff Analog Design Engineer

Work on detailed transistor level design of analog and mixed signal circuits for CMOS image sensors. Oversee the floor... plan and layout to make sure design responded as designed. Perform the whole chip simulation along with the block level...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 20 Dec 2025

Senior ODM Hardware Design Engineer

switching Embedded x86/ARM system design is highly desirable Experience working with systems featuring WiFi/Cellular/other RF... for Manufacturability (DFM) FPGA design and system simulation using Verilog Working with Contract Manufacturers Successfully taking...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 19 Dec 2025

Senior Mixed Signal Design Validation Engineer

in the world. Join us at the forefront of technological advancement. As a member of our Mixed Signal Design Validation team..., you will be responsible for the bring-up and characterization of high-speed mixed-signal circuits, in addition to performing system validation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Dec 2025

Principal Interconnect Micro-architect and RTL Design Engineer

and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team..., and physical design team to drive the RTL design and microarchitecture of modular network on chip IPs for AMD Data Center silicon...

Posted Date: 17 Dec 2025

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well... under DFT being designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST). Develops HVM content...

Company: Intel
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

DFT Design Engineer

to: Develops the logic design, register transfer level (RTL) coding, simulation, and provides DFT timing closure support as well... under DFT being designed (including TAP, SCAN, MBIST, BSCAN, proc monitors, in system test/BIST). Develops HVM content...

Company: Intel
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Senior ASIC Design Engineer

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU... for the future of computing. What you’ll be doing: As a key member of the Design team, you will be responsible for the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Dec 2025

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU... while collaborating closely with the logic design team on micro-architecture definition and feasibility. This position offers you the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Nov 2025