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Keywords: ASIC RTL Design/Integration Lead, Location: Bangalore, Karnataka

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ASIC RTL Design/Integration Lead

_ SMTS SILICON DESIGN ENGINEER - Custom Silicon ASIC RTL Design/Integration Lead THE ROLE: The focus of this role in the... AECG ASIC organization is to provide technical leadership in developing microarchitecture, implementing the design in RTL...

Posted Date: 28 Aug 2025

ASIC RTL / Soc Design Lead

and accelerator IP ASIC design flow and direct experience with ASIC RTL design and Integration. Digital design and experience...-on technical leadership in developing microarchitecture, implementing the design in RTL, RTL Integration etc. ensuring quality...

Posted Date: 27 Aug 2025

IP/RTL Design Lead

to 10 years of working experience in ASIC design Proficiency in Verilog/SystemVerilog RTL Experience in full IP design... cycle, requirements definition, architecture and microarchitecture specification. Active knowledge of ASIC design quality...

Posted Date: 15 Aug 2025

IP/RTL Design Lead

next gen data fabric to multiple business units. You will work on micro-architecture , design documentation, RTL... design implementation and micro-architecture of components of the Infinity Data Fabric Micro-architecture and RTL coding...

Posted Date: 06 Aug 2025

RTL Design(GPU) - Sr Lead Engineer

Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience... in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex...

Company: Qualcomm
Posted Date: 07 Jun 2025

Lead Engineer - RTL Design

node 2. Expertise in automated RTL Integration using any of the industry standard tool/EDA flow 3. Good knowledge... on AHB/AXI/APB/PIPE interface 4. Expertise in Verilog RTL coding and debugging 5. Expertise in writing ASIC UPF...

Company: Quest Global
Posted Date: 18 Jul 2025

Senior Lead Engineer - RTL Design

node 2. Expertise in automated RTL Integration using any of the industry standard tool/EDA flow 3. Good knowledge... on AHB/AXI/APB/PIPE interface 4. Expertise in Verilog RTL coding and debugging 5. Expertise in writing ASIC UPF...

Company: Quest Global
Posted Date: 18 Jul 2025

ASIC Physical design FCL Lead

_ SMTS SILICON DESIGN ENGINEER (AECG ASIC PD FCL Lead) THE ROLE: We are looking for an adaptive, self-motivative design... support to other teams PREFERRED EXPERIENCE: 12+ years of professional experience in physical design, preferably ASIC...

Posted Date: 25 Jul 2025

ASIC Physical Design Lead

_ SMTS SILICON DESIGN ENGINEER (AECG ASIC TFM Lead) THE ROLE: As a Silicon Design Engineer in the AMD AECG ASIC TFM... experience in physical design, preferably ASIC designs. Experience in automated synthesis and timing driven place and route...

Posted Date: 02 Jul 2025

ASIC Design Engineer

Architecture and Design of custom IPs for integration into SOC's. Design & Develop RTL for Interfaces, Power Management, Clocking... of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers...

Company: Amazon
Posted Date: 01 Aug 2025

Physical Design Lead

_ MTS SILICON DESIGN ENGINEER (AECG ASIC PD FCL) THE ROLE: We are looking for an adaptive, self-motivative design... place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows...

Posted Date: 01 Aug 2025

Lead Design verification Engineer

_ Silicon Design Verification Engineer The role: An RTL Design Verification Engineer role in our Security IP (SECIP..., and/or on subsystem level integration and verification for a variety of embedded MP subsystems. Your expertise will impact security policy...

Posted Date: 31 Jul 2025

DFT Silicon Design Engineer

_ AECG ASIC DFx - PMTS SILICON DESIGN ENGINEER THE ROLE: AECG SSD ASIC is a centralized ASIC design group within AMD... to integrate DFT requirements seamlessly into the overall design process. Lead Cross-Site Collaboration Coordinate with teams...

Posted Date: 26 Jun 2025

Senior Staff Engineer, Physical Design

at Marvell. Key responsibilities include: Work with design teams across various disciplines such as Digital/RTL/Analog... to ensure design convergence and integration in a timely manner. Implement/support designs with multi-voltage designs through...

Company: Marvell
Posted Date: 22 Jun 2025

Technical Director, Physical Design

in major foundries. Strong understanding of ASIC design flow, RTL integration, synthesis, and timing closure. In-depth... design capabilities and infrastructure in alignment with company-wide technology strategy. Lead RTL-to-GDSII implementation...

Company: Marvell
Posted Date: 22 Jun 2025

Chip Top lead

integration at the chip level. Analyse and optimize PPA to meet design targets. Collaborate with RTL, STA, power, DFT...Job Requirements Role Overview We are looking for an experienced Physical Design Chip Lead to lead the end-to-end...

Company: Quest Global
Posted Date: 06 Aug 2025

Senior DFT Engineer

verilog/system verilog RTL related to DFT logic design. ATE Test Readiness: Lead DFT-to-ATE handoff, including:  Drive.... Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning...

Company: Amazon
Posted Date: 30 Aug 2025

Senior DFT Engineer

verilog/system verilog RTL related to DFT logic design. ATE Test Readiness: Lead DFT-to-ATE handoff, including:  Drive.... Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning...

Company: Amazon
Posted Date: 30 Aug 2025

Principal Engineer - Hybrid

development, integration & verification of ASIC/FPGA. Collins Aerospace, a Raytheon Technologies company, is a leader... Responsibilities: Develop FPGA based design from systems requirement for the new designs in compliance with DO-254 for DAL A/B...

Posted Date: 28 Aug 2025

Principal Engineer - Hybrid

development, integration & verification of ASIC/FPGA. Collins Aerospace, a Raytheon Technologies company, is a leader... Responsibilities: Develop FPGA based design from systems requirement for the new designs in compliance with DO-254 for DAL A/B...

Posted Date: 28 Aug 2025