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Keywords: ASIC Verification Engineer, Location: San Jose, CA

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Principal ASIC Verification Engineer

Principal ASIC Verification Engineer This role has been designed as ''Onsite' with an expectation... Networks, part of Hewlett Packard Enterprise (HPE) is seeking a highly skilled and experienced Principal ASIC Verification...

Posted Date: 12 Oct 2025

ASIC Verification Engineer

ASIC Verification Engineer This role has been designed as 'Hybrid' with an expectation that you will work.... Responsibilities: You will be exposed to the latest verification methodologies such as UVM and you will enable complex feature...

Posted Date: 10 Oct 2025

Principal ASIC Verification Engineer

Principal ASIC Verification Engineer This role has been designed as ‘’Onsite’ with an expectation... Networks, part of Hewlett Packard Enterprise (HPE) is seeking a highly skilled and experienced Principal ASIC Verification...

Posted Date: 10 Oct 2025

ASIC Verification Engineer

ASIC Verification Engineer This role has been designed as ‘Hybrid’ with an expectation that you will work.... Responsibilities: You will be exposed to the latest verification methodologies such as UVM and you will enable complex feature...

Posted Date: 09 Oct 2025

Principal Engineer - ASIC Verification

Engineer with a solid ASIC/FPGA verification test strategy & development and debugging skills. Responsibilities: Working...Job Category: Applied R&D Degree Level: Master's degree Job Description: We are seeking an ASIC Verification...

Company: Nokia
Location: San Jose, CA
Posted Date: 24 Sep 2025

Staff Engineer - ASIC Verification

Engineer with a solid ASIC/FPGA verification test strategy & development and debugging skills."The Network Infrastructure group...Job Category: Applied R&D Degree Level: Master's degree Job Description: We are seeking an ASIC Verification...

Company: Nokia
Location: San Jose, CA
Posted Date: 23 Sep 2025

Senior ASIC Design Verification Engineer

to talk to you. What you’ll do: As a Senior ASIC Design Verification Engineer, you will be responsible for verifying... and responsibilities include: Lead comprehensive verification planning and execution for fabric-level and full-chip designs, ensuring...

Company: Persimmons
Location: San Jose, CA
Posted Date: 24 Aug 2025

ASIC Design Engineer Staff

ASIC Design Engineer Staff This role has been designed as 'Hybrid' with an expectation that you will work... design using Verilog or System Verilog Write functional coverage/SVA to help verification catch corner case bugs. Make sure...

Posted Date: 09 Oct 2025

ASIC Engineer 3

ASIC Engineer 3 This role has been designed as 'Hybrid' with an expectation that you will work on average 2 days... infrastructure/methodology (5%) Required Skills: ASIC Verification using SystemVerilog Experience in constrained-random...

Posted Date: 09 Oct 2025

ASIC Engineer Sr Staff

ASIC Engineer Sr Staff This role has been designed as 'Hybrid' with an expectation that you will work on average 2... Design-for-Test (DFT) Engineer to join our team and contribute to the development of advanced 3nm and beyond networking...

Posted Date: 09 Oct 2025

ASIC Engineer Sr Staff

ASIC Engineer Sr Staff This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2... Design-for-Test (DFT) Engineer to join our team and contribute to the development of advanced 3nm and beyond networking...

Posted Date: 08 Oct 2025

ASIC Engineer 3

ASIC Engineer 3 This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2 days... infrastructure/methodology (5%) Required Skills: ASIC Verification using SystemVerilog Experience in constrained-random...

Posted Date: 08 Oct 2025

ASIC Design Engineer Staff

ASIC Design Engineer Staff This role has been designed as ‘Hybrid’ with an expectation that you will work... design using Verilog or System Verilog Write functional coverage/SVA to help verification catch corner case bugs. Make sure...

Posted Date: 08 Oct 2025

Sr ASIC Synthesis Engineer (Remote)

-quality netlists with robust DFT integration. Collaborates cross-functionally with RTL, verification, and backend teams... to minimize ECO cycles and accelerate signoff readiness. Requirements: 8+ years' hands-on experience in ASIC synthesis...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 04 Oct 2025
Salary: $140000 - 160000 per year

Sr ASIC Synthesis Engineer (Remote)

-quality netlists with robust DFT integration. Collaborates cross-functionally with RTL, verification, and backend teams... to minimize ECO cycles and accelerate signoff readiness. Requirements: 8+ years’ hands-on experience in ASIC synthesis...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 04 Oct 2025
Salary: $140000 - 160000 per year

ASIC/RTL Design Engineer - Senior (US)

; - Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification..., Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 25 Sep 2025

ASIC/RTL Design Engineer - Senior (US)

; - Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification..., Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing...

Company: Managed Staffing
Location: San Jose, CA
Posted Date: 25 Sep 2025

FPGA/ASIC Engineer

, and Verification teams to validate the functional and performance objectives of the SoC. What we are looking for: A Bachelor...'s Degree in Electrical or Computer Engineering, accompanied by a minimum of 10 years of experience in ASIC or a related field...

Company: Nesco Resource
Location: San Jose, CA
Posted Date: 18 Sep 2025
Salary: $60 - 65.33 per hour

Digital Verification Engineer

Broadcom is looking for a senior level Digital Design Verification engineer. In this highly visible role... you will be working on ASIC for data center connectivity applications. Qualifications include: MS or PhD in Electrical Engineering...

Company: Broadcom
Location: San Jose, CA
Posted Date: 09 Oct 2025
Salary: $120000 - 192000 per year

GPU Formal Design Verification Engineer

enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey... solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation...

Company: Prodapt
Location: San Jose, CA
Posted Date: 24 Sep 2025