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Keywords: Design Verification Engineer, Location: Santa Clara, CA

Page: 1

Principal ASIC Design Verification Engineer (NetSec)

. Job Description Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking... in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation...

Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Senior Design Verification Engineer

! We are looking for a Senior Design Verification Engineer to join our growing team in Atlanta, GA (onsite). Essential Functions: Lead... into anomalies, defects, and failures, ensuring timely resolution. Competencies: 5+ years of experience in design verification...

Company: Qualitest
Location: Santa Clara, CA
Posted Date: 04 Dec 2025
Salary: $110000 - 120000 per year

Sr Principal ASIC Design Verification Engineer (NetSec)

. Job Description Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking... in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation...

Location: Santa Clara, CA
Posted Date: 03 Dec 2025

Design Verification Engineer

design as the base for all our IP. We are looking for a design verification engineer in the Dram Controller IP at AMD's Santa... Engineer and technical lead. This role is crucial to ensuring IP quality through rigorous formal verification processes. THE...

Posted Date: 03 Dec 2025

Design Verification Engineer

! We are looking for a Design Verification Engineer to join our growing team in Sunnyvale, CA United States! Job Description: Ensure the... unit's micro-architecture and design specification. Develop: Architect and implement reusable, robust verification...

Company: Qualitest
Location: Santa Clara, CA
Posted Date: 28 Nov 2025
Salary: $110000 - 130000 per year

ASIC Design Verification Engineer (Santa Clara, CA)

and products. This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team..., Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 22 Nov 2025
Salary: $126700 - 190100 per year

Senior Design Verification Engineer

ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document... verification Work with design team to understand Spec and come up comprehensive test plan for quality Verification...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 14 Nov 2025
Salary: $126700 - 190100 per year

Lead Design Verification Engineer

your career. THE ROLE: We are seeking a seasoned Lead Design Verification Engineer with expertise in verifying networking chip... Verification Engineer to drive the verification strategy, methodology, and execution for our next-generation high-performance...

Posted Date: 09 Nov 2025

DDR Design Verification Engineer

your career. THE ROLE: We are looking for an experienced Verification Engineer to join our team as a Technical Lead... solutions for marketing/feature change requests Work closely with Design teams for Area and Floorplan refinement, Verification...

Posted Date: 07 Nov 2025

SOC Design Verification Engineer

"Possible 3 Month CTH | No Fees | Do Not Re-Post| Confidential TMR ID: # JYTONZ Role: SOC Design Verification.... Experience in development of UVM based verification environments from scratch. Experience with Design verification of Data...

Posted Date: 01 Nov 2025

CPU Design Verification Engineer

Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the... next groundbreaking Apple product. In this highly visible role, you will be at the center of a chip design effort collaborating...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $126800 - 190900 per year

CPU Design Verification Engineer

Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the following... next groundbreaking Apple product. In this highly visible role, you will be at the center of a chip design effort collaborating...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Design Verification Engineer

Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the following... next groundbreaking Apple product. In this highly visible role, you will be at the center of a chip design effort collaborating...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Top-Level Design Verification Engineer

Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower... power processor design, you will have the responsibilities as follows: • Work closely with verification engineers and RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 18 Sep 2025
Salary: $126800 - 190900 per year

CPU Top-Level Design Verification Engineer

Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower... power processor design, you will have the responsibilities as follows: • Work closely with verification engineers and RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 18 Sep 2025

RF/Analog Design/Functional Modeling and Verification Engineer – AI/ML Enhanced

verification workflows to accelerate design cycles and improve quality. Required for this Role: Bachelor's degree...+ years in ASIC design, verification, or related work. OR Master's degree in Electrical Engineering or related field...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 05 Nov 2025

AI/ML Design Verification Methodology Lead Engineer

: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies..., and coverage-based verification methodology Experience with C/C++, assembly language. Knowledge of low power design concepts...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 09 Oct 2025

Senior Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design... Verification Team, you will verify all of the circuitry that goes inside our chips for the general market and for specific...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025

Principal Design Verification Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As part of the Design Verification... with scripting language such as Python or Perl and EDA Verification tools. Experience with Object-Oriented Design and implementation...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025
Salary: $146850 - 220000 per year

Principal Engineer, Design Verification

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low...-power techniques. What You Can Expect In this role, you will architect and develop a functional verification environment...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Oct 2025
Salary: $146850 - 220000 per year