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Keywords: Senior Engineer - RTL Design, Location: Bangalore, Karnataka

Page: 4

Senior Engineer - AMS DV

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... year to 6 years in Design Verification Responsible for RTL and GLS level validation at SOC. Post Silicon validation...

Company: Qualcomm
Posted Date: 07 Jun 2025

STA/Timing Methodology Engineer (Senior/Lead/Staff)

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical... TCL/Perl/Python. Familiar with digital flow design implementation RTL to GDS : ICC, Innovous , PT/Tempus Familiar...

Company: Qualcomm
Posted Date: 22 May 2025

Senior Staff / Principal Engineer Chip Verification

and by integrating 3rd partyVIP components. Simulate and debug at RTL, Unit Delay, and Gate Level usingappropriate tools and flows... design &verification. Knowledge and hands-on experience of System Verilog and UVM. Exposure to version-controlling (eg, Git...

Company: Infineon
Posted Date: 25 Jun 2025

Senior DV Engineer

Job Requirements Job Summary: We are looking for passionate and motivated SoC Design Verification Engineers to work... development & debug Debug simulation failures and work with RTL team for resolution. Functional & code coverage analysis...

Company: Quest Global
Posted Date: 19 Jul 2025

Senior Engineer

) Have knowledge of RTL design (System Verilog); Ideally have knowledge of working with Verification IPs (VIPs) Contact: Gowri...

Company: Infineon
Posted Date: 18 Jul 2025

Senior Staff Engineer Verification

. You have sound knowledge of firmware and RTL design (VHDL) - experience with Cadence verification software... integrating the results achieved into Infineon's design system and supporting their implementation in the development of new...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Engineer Digital Functional Verification

requirements; You have good know-how with UVM especially using SystemVerilog. Have knowledge of firmware and RTL design (VHDL...

Company: Infineon
Posted Date: 25 Jun 2025

Senior Staff Engineer

test plan,coverage and assertion closure. The role will Interact with other functional leads from Design, FW/SW...,Validation Teams. The role will evaluate new tools & methodologies required forcontinuous improvement of design flows...

Company: Infineon
Posted Date: 24 Jun 2025

Senior Engineer MSV

, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate.... One should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools. Knowledge of digital design techniques, Verilog HDL...

Company: Infineon
Posted Date: 24 Jun 2025

Senior Engineer Digital Functional Verification

in UVM and UPF. You have sound knowledge of firmware and RTL design (VHDL) -experience with Cadence verification software... and verification coverage through integrating the results achieved into Infineon's design system and supporting their implementation...

Company: Infineon
Posted Date: 24 Jun 2025

Senior Staff Engineer Verification

, assertions, coverage, and debuggingAMS simulations. Interact with Analog, RTL & DV teams to bring up system level scenarios... regulator andswitching regulator. Strong interest and understanding of Design and verification methodologies (OVM/UVM). Self...

Company: Infineon
Posted Date: 24 Jun 2025

Senior Digital Implementation Engineer

flow design aspects RTL to GDS Proficiency in tcl/perl/python scripts and automation on timing analysis tools Innovate...) signoff for multi-mode, multi-corner STA flow optimization Work on design automation using TCL/Perl/Python Position...

Posted Date: 24 Apr 2025

Principal Application Engineer

is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies... its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts...

Posted Date: 12 Jun 2025

GPU Functional Verification Sr Engineer

) Most importantly, ability to learn, improve and deliver Experience Minimum 3 years of Design verification experience Senior... Engineer, your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware...

Company: Qualcomm
Posted Date: 09 Jul 2025

GPU Functional Verification Sr Engineer

) Most importantly, ability to learn, improve and deliver Experience Minimum 3 years of Design verification experience Senior... Engineer, your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware...

Company: Qualcomm
Posted Date: 09 Jul 2025

SMTS STA / Synthesis Engineer

_ SMTS SILICON DESIGN ENGINEER(Timing Constraints/STA Signoff Technical Lead) THE ROLE: As a member of the AECG ASIC.... THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate...

Posted Date: 20 Jun 2025

Technical Lead - FPGA IVV Engineer (SV UVM)

/BIT Bucket/ REQTIFY/DOORS Good experience in RTL Design using VHDL, FPGA Implementation, Testing, Integration... technologies and expertise in Defence, Transport, Aerospace and Digital Identity and Security markets. FPGA IVV Engineer...

Company: Thales
Posted Date: 19 Jun 2025

Principal Engineer Verification

cases andSystem Verilog/UVM test bench components and by integrating 3rd partyVIP components. Simulate and debug at RTL... Engineering or ComputerScience with 14+ years of relevant work experience. Strong foundational knowledge of digital design...

Company: Infineon
Posted Date: 25 Jun 2025

Senior IP Micro-architect

Summary: We are seeking a highly skilled and experienced IP Design Engineer to join our dynamic team. The ideal candidate... will have a strong background in microarchitecture design, RTL design for complex IPs, and a deep understanding of AMBA or PCIe protocols. This role...

Company: Qualcomm
Posted Date: 06 Jul 2025

Associate I - VLSI Lib

of VLSI Frontend Backend or Analog design Outcomes: * Works as an individual contributor and on any one task of RTL Design... delivery as approved by the senior engineer Measures of Outcomes: * Quality –verified using relevant metrics by Lead Timely...

Company: UST
Posted Date: 18 Jul 2025