Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: SoC Power Analysis and Optimization Engineer, Location: San Diego, CA

Page: 1

SoC Power Analysis and Optimization Engineer

optimization. - Working with SOC power team members to automate the power analysis and optimization tasks - Explore new methodology... they've never before envisioned. In this highly visible role, you will be responsible for SOC power optimization automation, power...

Company: Apple
Location: San Diego, CA
Posted Date: 13 Jun 2025

SoC Power Modeling Engineer

to many Apple products. We are looking for an engineer who will work on the modeling of power dissipation of various IPs... to model power and current profiles for various IPs of the SOC, and the voltages-frequency operating points. The...

Company: Apple
Location: San Diego, CA
Posted Date: 22 Aug 2025

SoC Power Validation Engineer

of typical SoC workloads. The analysis of the workloads and their power dissipation will help drive the power optimization... is looking for a motivated engineer to fill a full-time position. The primary role is to engage in power hardware validation and analysis...

Company: Apple
Location: San Diego, CA
Posted Date: 19 Jun 2025

Cellular PPAC (Power, Performance Area and Cost) Engineer

design technology co-optimization analysis, including optimal voltage point analysis for performance/power curves..., optimizing, and manufacturing our next-generation, high-performance, power-efficient cellular chips and system-on-chips (SoC...

Company: Apple
Location: San Diego, CA
Posted Date: 14 Aug 2025

Thermal Engineer

Summary: Qualcomm is actively seeking a thermal engineer for the Design Technology (Dtech) SoC thermal analysis team. The... specification studies and Power Performance Area Thermal Optimization. Model and recommend SoC-level floorplan, performance...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 22 Aug 2025
Salary: $115600 - 173400 per year

Physical Design Engineer - Multiple Levels

, floorplanning, power planning, IR drop analysis, cell placement, multi-mode & multi-corner (MMMC) clock tree synthesis, routing..., timing optimization and closure, RC extraction, signal integrity, cross talk noise and delay analysis, debugging timing...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 13 Jul 2025

Processor RTL Design Engineer

General Summary: A variety of high performance, low power Hexagon cores are at the heart of Qualcomm's multi-tier mobile SOC... and timing closure Work with low power team on power optimization Work with verification team to collaborate on test plan...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 28 Aug 2025
Salary: $127200 - 190800 per year

Software Development Engineer - Firmware

systems for the latest SoC blocks and chipsets in Apple. Work with cross-functional teams to design and develop algorithms... software development and system performance, and mechanism (power-on boot vector, system boot up, and application executing...

Company: Apple
Location: San Diego, CA
Posted Date: 28 Aug 2025
Salary: $139500 - 210100 per year

Processor Micro Architect RTL Design Engineer (Multiple Levels)

General Summary: A variety of high performance, low power Hexagon cores are at the heart of Qualcomm's multi-tier mobile SOC... and timing closure Work with low power team on power optimization Work with verification team to collaborate on test plan...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 17 Jul 2025