TITILE: RTL DESIGN ENGINEER (Principal/Senior Staff/Staff Engineer) Location: Bangalore/Hyderabad EXPERIENCE: 10... years to 15 years RTL design in Verilog/SystemVerilog -Micro-architecture, integration & debug -Synthesis-friendly...
, and Networking. What You Can Expect As a Principal Design Engineer, you will lead micro-architecture and RTL development and HW..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Engineer...
RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior Staff...
. Job Description We are looking for a highly motivated engineer to develop synthesizable RTL models, validate them using UVM testbenches, and deliver optimized... and subsystems using Verilog/SystemVerilog. Collaborate with design teams to ensure RTL is emulation-friendly and meets performance...
Years Design engineer for RTL Design integration of SOCs. Design sign off Quality checks - Lint, CDC, RDC and design...
. Job Description About the Role: We are seeking a highly experienced and motivated Principal Engineer specialising in SoC RTL Design for System... Responsibilities: Define and review SoC architecture and design specifications. Develop high-quality RTL which is synthesizable...
your career. Senior Lead - RTL Design Engineer THE ROLE: In this role you will be given an opportunity to work on the... high speed ( 2G) design. THE PERSON: As a Synthesis design engineer, you will work with architects/designers for IP...
RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Senior Staff...
and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help... specification. RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing...
, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Staff Engineer... of experience. Excellent Logic design and debug skills; knowledgeable in bus protocols like AHB/AXI/I2C/UART RTL design experience...
Job Description Summary role description: Hiring RTL Design Engineer for a global leader in electronic design...: RTL Design Engineer Location: Bengaluru, India Reporting Manager: Senior Manager Role & responsibilities: Design...
your career. LEAD ENGINEER - RTL DESIGN THE ROLE: As a member of the Radeon Technologies Group, you will help bring to life... of components of the Infinity Data Fabric, including cache design . Micro-architecture and RTL coding in Verilog/SystemVerilog...
the requirements and design efficient RTL implementations targeting FPGAs. Translate MATLAB models to RTL for hardware... as required Required Skills & Experience: Strong RTL design skills in VHDL with knowledge of digital signal processing fundamentals Familiarity...
collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the... Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors...
that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company.... Drive and participate in specification writeup Conduct detailed performance, architectural and design requirement reviews...
-Lite/NoC concepts Good knowledge of Digital Design and RTL development Hands-on experience with SoC Design, Verilog RTL... General Summary: NoC design lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible...
in Electrical Engineering or Computer Science, with 7+ years of experience on IP/Sub-System RTL Design. Experience in testbench... and industrial safety and security standards. Areas of Responsibilities: Contribute to the RTL delivery for a multitude...
General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience in Logic design.../micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex multi clock...
-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA Good understanding... on experience in Low power SoC design is required. Responsibilities Mirco architecture & RTL development and its validation...
) goals for Sub-system. Define various aspects of the block level design such as block diagram, interfaces, clocking..., transaction flow, pipeline, low power etc. Perform as well as lead a team of engineers on RTL coding for Sub-system/SOC...