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Keywords: Senior ASIC Clock Engineer, Location: Santa Clara, CA

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Senior ASIC Clock Engineer

NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work..., NIC and SoC products. Micro architect and design next generation clock topologies and modules. ASIC Clock scheme...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Jul 2025

Senior ASIC Timing Engineer

. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and highly motivated individual... of clocking and clock controls in DFT modes. Experience in methodology or flow development. NVIDIA is widely considered...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Jun 2025

Senior ASIC Floorplan Design Engineer

We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA is seeking a talented ASIC Floorplan Engineer... during early chip development. Drive the area review process and collaborate with the ASIC design team to identify area...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 May 2025

Senior ASIC Design Engineer - Hardware

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team... to the SW team to come up with an efficient clock programming sequence. The team works with the silicon solution team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 31 Jul 2025

Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive... To See: MS (or equivalent experience) in Electrical or Computer Engineering with 3 years’ experience in ASIC Design and Timing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Jul 2025

Senior Staff Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Physical Design... Engineer at Marvell Technology, you will be a key part of a highly skilled global team focused on designing next-generation...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 12 Jun 2025
Salary: $124420 - 186400 per year

Senior Timing and Constraints Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative senior timing signoff and constraint methodology... engineer to develop pioneering timing sign-off strategies for next-generation GPUs and SoCs. In this role, you’ll develop...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Hardware & Silicon Validation Senior Staff Engineer

group designs and develops test platforms for validating multi-core Arm-based Network processors and custom ASIC’s, used... and maintain bare-metal embedded test code in C/C++ to control and validate high-speed ASIC SoCs across various product lines...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 17 Jul 2025
Salary: $121400 - 181800 per year

SoC Design Engineer

; Machine-learning, AI; FPGA. Title: Engineer (mid-senior career) Location: Santa Clara, CA. Hybrid. Relocation assistance...We seek a skilled front-end SoC design engineer. A customer driven professional with a track record of effective...

Posted Date: 01 Jun 2025