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Keywords: Senior ASIC Timing Engineer, Location: Santa Clara, CA

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Senior ASIC Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer... inventiveness and intelligence. What you'll be doing: Drive timing analysis and closure of Nvidia’s GPUs, CPUs, DPUs and SoCs...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 08 Oct 2025

Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive... To See: MS (or equivalent experience) in Electrical or Computer Engineering with 3 years’ experience in ASIC Design and Timing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

Senior Timing Methodology Engineer, Custom Circuits

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive... with 5+ years experience in ASIC Design and Timing. Proven understanding of circuit design and spice simulations. Hands...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

Senior Timing CAD Engineer, Applied AI

for EDA, semiconductor, or complex data domains .Strong background in VLSI/ASIC design — with deep understanding of timing..., to amplify human inventiveness and intelligence. NVIDIA’s ASIC-PD Methodology organization is driving the next generation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Oct 2025

Senior ASIC Design Engineer, Memory Controller

NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer, you'll... and design including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Dec 2025

Senior ASIC Design Engineer

NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design... engineer at NVIDIA, you'll join a group of hard-working engineers to design and implement innovative coherent fabrics...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Dec 2025

Senior ASIC Design Engineer

We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA... limitations. Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Nov 2025

Senior ASIC Design Engineer - DFX

We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades... teams. Partner with design, verification, synthesis, timing, and backend teams to ensure cohesive integration. Create...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Oct 2025

Senior ASIC Physical Design Engineer, Netlisting

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer... quality checks, etc. Help in all aspects of physical design, such as driving timing convergence, timing constraints...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 08 Oct 2025

Senior ASIC Design Engineer - Hardware

We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design...-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. Support post-silicon validation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Dec 2025

Senior ASIC Design Engineer – Clocks IP

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team... of timing closure to innovate and implement new Clocking topologies in RTL. Collaborate with Physical design and timing team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior ASIC RTL Design Engineer

IP/ASIC design and Verilog RTL development Experience in full IP design cycle, requirements definition, architecture... and microarchitecture specification. Should be well versed with RTL design verification, design quality checks, synthesis, timing closure...

Posted Date: 26 Dec 2025

Senior ASIC Design Engineer (NetSec)

. Job Description Your Career Join our ASIC team and help deliver the digital logic that powers our next-generation firewall platforms... coverage, and add design-for-debug features. Partner with physical-design teams: review synthesis/timing reports, rewrite RTL...

Location: Santa Clara, CA
Posted Date: 17 Dec 2025

Senior ASIC Design Engineer (NetSec)

. Job Description Your Career Join our ASIC team and help deliver the digital logic that powers our next-generation firewall platforms... coverage, and add design-for-debug features. Partner with physical-design teams: review synthesis/timing reports, rewrite RTL...

Location: Santa Clara, CA
Posted Date: 16 Dec 2025

Senior ASIC Design Engineer

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU... limitations. You are expected to own micro-architecture, implement RTL, and deliver a fully verified, synthesis/timing clean...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Dec 2025

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure... and Physical design teams responsible for achieving timing, area, performance and power goals of the unit. Help define the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Nov 2025

Senior ASIC Engineer

. Candidate will assist in synthesis and gate-level simulation tasks related to your module and will assist with timing of the... will have: *RTL Design *ASIC front-end experience *Scripting Languages knowledge (e.g. Perl or Python) Minimum Qualifications...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Nov 2025
Salary: $126700 - 190100 per year

Senior Signal and Power Integrity Engineer - Hardware

We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two... to optimize package, PCB, ASIC, mixed signal circuit What we need to see: BS/MS-Electrical Engineering or equivalent...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Nov 2025

Senior Principal Digital IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Principal Digital IC... Design Engineer at Marvell, you will be part of the DCE – Connectivity Business Group, contributing to the development...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 12 Nov 2025

Senior Principal Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... Expect As a senior leader in the central physical design team, you will: Shape the long-term vision for physical design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025