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Keywords: Test Chip Design , Location: Santa Clara, CA

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Test Chip Design & Validation Engineer

which architects the test chip to validate the critical IPs developed for pioneering Apple product ASICs. The IPs validated... at the start of a fast-paced new design cycle. You will work with production chip architects, front end and DFT teams, custom...

Company: Apple
Location: Santa Clara, CA
Posted Date: 22 Jul 2025

System on Chip Security Architect

cycle management, secure boot & debug. In addition, you will work with SoC architects to influence chip architecture... is a high-visibility role acting as the end-to-end platform security owner working with chip and system architecture teams...

Posted Date: 15 Jun 2025

Design-for-Test (DFT) Engineer

, secure, and performance-optimized compute. As a Design-for-Test Engineer, you’ll help ensure silicon reliability and debug... across the chip lifecycle. You'll collaborate cross-functionally with design, verification, and physical design teams...

Company: Initio Capital
Location: Santa Clara, CA
Posted Date: 04 Aug 2025

Senior Design For Test Engineer

compared to CPU-based alternatives Microsoft DPU team in Santa Clara is looking for a Senior Design For Test Engineer to help... and validation for various fault models Timing constraint development for DFT structures Design and integrate test structures...

Company: Microsoft
Location: Santa Clara, CA
Posted Date: 18 Jul 2025

Senior Test Engineer

design and development with efficient air and liquid cooling setup. Manage test facility KPIs. Plan and drive tester... including identification, specification, design and qualification of test fixtures, test equipment and diagnostic software...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 06 Aug 2025

Senior Photonics Test Engineer

and manufacturing sites. Partner with internal design, fabrication, and packaging multi-functional teams to establish new test... packaging experience. Strong background & experience in Silicon Photonics design, fabrication, test, packaging and assembly...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jul 2025

Server Test and Productization Specialist

will have extensive knowledge of semiconductor technologies for design, test and manufacturing. Experience with state-of-the-art test...-class high performance solutions that are highly optimized for the needs of the server product. Position: Server Test...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 05 Jul 2025

Test Engineer

with design to make sure their chip features are testable and that the results meet the customer’s specifications. You may... or a strong foundation in high-speed interconnects, SerDes testing, and system-level test development, as well as test hardware design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 20 May 2025
Salary: $115790 - 173500 per year

Silicon Design Verification Engineer

-simulation or working on firmware test coverage Past contributions to hardware/software co-design workflows Previous... Sponsorship: H-1B, O-1, OPT Available 🚀 About the Opportunity Initio Capital is hiring a Design Verification Engineer...

Company: Initio Capital
Location: Santa Clara, CA
Posted Date: 04 Aug 2025
Salary: $150000 - 250000 per year

Package Design Engineer

interconnect scheme, and lead the package layout design process for package test vehicles The focus will be primarily on flip... chip and 2.5D interposer based packages Implement electrical/mechanical/thermal structures in test vehicles for effective...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Aug 2025
Salary: $108000 - 184000 per year

Custom Circuits Design Engineer

opportunity to be at the center of chip design effort working with many teams on critical impact issues to enable product ramp... for the test chips and product chips. • Perform design analysis, modeling/simulation, spice simulation, statistical analysis...

Company: Apple
Location: Santa Clara, CA
Posted Date: 01 Aug 2025

Principal Physical Design Engineer, ATG

physical design chip implementation on advanced silicon node technologies Track record of production chip work P&R CAD... is looking for a highly motivated Principal Physical Design Engineer to join our group. Do you have a proven EE background with an in-depth...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 31 Jul 2025

CPU Server Physical Design Timing Engineer

Design Timing Engineer, you will work with microarchitecture and RTL design team to develop timing constraints, drive... flow optimization and Spice to STA correlation. Find out the root cause of timing miscorrelation at different design...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 24 Jul 2025

Senior Mixed Signal Design Verification Engineer

from design specifications, and execute both block- and chip-level tests. Automate verification workflows using PERL and Python... to streamline test generation and debugging. Collaborate with design engineers to analyze and resolve RTL and gate-level...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 19 Jul 2025

Senior Analog SerDes Design/Architect Engineer

test plans for post-silicon characterization. Document all design work with review materials and detailed design... with Mixed signal design flow. Experience with full-chip designs, ESDs and verification flows Preferred Qualifications...

Company: Intel
Location: Santa Clara, CA
Posted Date: 19 Jul 2025

Design Verification Engineer

using SystemVerilog and UVM for IP and SoC designs. Develop test plans and coverage metrics from design specifications..., and execute verification at both block and chip levels. Automate environment setup and test generation using PERL and Python...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 10 Jul 2025

Analog Design Engineer

Cadence Virtuoso; Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design... and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Whole chip layout integration...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 25 Jun 2025
Salary: $151091 - 155000 per year

Analog Design Engineer

on detailed transistor level design of analog and mixed signal circuits for CMOS image sensors. Perform the whole chip simulation...We are looking for qualified Analog design engineers who have a good understanding of analog circuit and CMOS Image...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 22 Jun 2025
Salary: $110400 - 140000 per year

ASIC Design Engineer

cases for the module level and chip level. Participate in FPGA emulation and post-silicon validation. Write design..., including hands-on experience in ASIC chip design and integration. Requires knowledge of Verilog, system Verilog, C or C...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 22 Jun 2025
Salary: $120000 - 145000 per year

Senior Silicon Circuits System Design Engineer

across multiple business units, converting chip and board level dI/dt analysis/mitigation techniques and board PDN design knowledge... to hardware features, design requirements, silicon characterization needs, and test requirements. Design essential...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 15 Jun 2025